In some applications utilizing power amplifiers, there is a need to vary the output power delivered to a load. For example, in a cell phone environment, it is desired to vary the output power of the cell phone based on various factors. For example, a base station may dictate the power level at which each cell phone should transmit (based on factors such as the physical distance from the base station, for example). A standard method of controlling the output power of a power amplifier is to use a voltage regulator to regulate the battery or power supply voltage.
FIG. 1 is an example of an RF power amplifier 100 regulated by a voltage regulator 102. The power amplifier 100 receives an RF input signal (RFIN) and amplifies the signal to generate an RF output signal (RFOUT). The voltage regulator 102 is connected between the power amplifier 100 and a supply voltage (VBATTERY) and provides a regulated voltage to the power amplifier 100. The voltage regulator 102 receives a power control signal (VAPC) which relates to a desired output power level.
FIG. 2 illustrates an example of a prior art power control circuit for regulating a supply voltage using an op-amp feedback circuit. FIG. 2 shows a voltage regulator 102 connected between a voltage supply and a power amplifier 100. The voltage regulator 102 is comprised of a switching device M1 and an op-amp 104, which form a feedback circuit. Since the power amplifier 100 requires high DC current to be drawn from the supply voltage, the switching device M1 will be large and will have a large gate capacitance. It is standard practice in the prior art to compensate the op-amp with the gate capacitance of switching device M1. FIG. 3 illustrates an example of a prior art power control circuit using a current regulator. FIG. 3 shows a current regulator 103, connected between a voltage supply and a power amplifier 100. The current regulator 103 is comprised of switching device M1, an op-amp 104, summer 105, and resister R3. The circuit develops a voltage across the resistor R3 that is proportional to the DC current supplied to the power amplifier 100, which is provided as an input to the op-amp 104.
One problem with a prior art power control circuit, such as the circuit shown in FIG. 2, is that switching device M1 saturates at high power levels, especially when the battery is low. When the switching device M1 saturates, the voltage between the source and drain of the switching device M1 and the loop gain of the feedback loop goes to zero. The unity gain frequency of the feedback loop also goes to zero. When the unity gain frequency of the feedback loop goes to zero, the waveform illustrated in FIG. 4 is observed. FIG. 4 illustrates the voltage regulator output, VREG (at the output of voltage regulator 102), versus time. TX represents the delay from a desired waveform VAPC (at the output of voltage regulator 102) which is introduced to VREG by regulator 102 when M1 saturates. The switching power envelope at the output of power amplifier 100 that corresponds to waveform VREG may violate the switching transient specification for an industry standard (e.g., a GSM TDMA standard). Therefore, there is a need to solve the problems described above.